Temporary patch to return dom0 stability

diff --git a/xen/arch/ia64/xen/vcpu.c b/xen/arch/ia64/xen/vcpu.c
index ca95346231615be914605b192723fffde1f45a67..de22cd825eff3f3b12b57e94a5b6079fafcdc838 100644 (file)
--- a/xen/arch/ia64/xen/vcpu.c
+++ b/xen/arch/ia64/xen/vcpu.c
@@ -1,11 +1,17 @@
 /*
  * Virtualized CPU functions
  *
- * Copyright (C) 2004 Hewlett-Packard Co.
+ * Copyright (C) 2004-2005 Hewlett-Packard Co.
  *     Dan Magenheimer (dan.magenheimer@hp.com)
  *
  */
 
+#if 1
+// TEMPORARY PATCH for match_dtlb uses this, can be removed later
+// FIXME SMP
+int in_tpa = 0;
+#endif
+
 #include <linux/sched.h>
 #include <public/arch-ia64.h>
 #include <asm/ia64_int.h>
@@ -1317,8 +1323,10 @@ IA64FAULT vcpu_translate(VCPU *vcpu, UINT64 address, BOOLEAN is_data, UINT64 *pt
        /* check 1-entry TLB */
        if ((trp = match_dtlb(vcpu,address))) {
                dtlb_translate_count++;
-               //*pteval = trp->page_flags;
-               *pteval = vcpu->arch.dtlb_pte;
+               if (vcpu->domain==dom0 && !in_tpa) *pteval = trp->page_flags;
+               else *pteval = vcpu->arch.dtlb_pte;
+               printf("DTLB MATCH... NEW, DOM%s, %s\n", vcpu->domain==dom0?
+                       "0":"U", in_tpa?"vcpu_tpa":"ia64_do_page_fault");
                *itir = trp->itir;
                return IA64_NO_FAULT;
        }
@@ -1369,7 +1377,9 @@ IA64FAULT vcpu_tpa(VCPU *vcpu, UINT64 vadr, UINT64 *padr)
        UINT64 pteval, itir, mask;
        IA64FAULT fault;
 
+       in_tpa = 1;
        fault = vcpu_translate(vcpu, vadr, 1, &pteval, &itir);
+       in_tpa = 0;
        if (fault == IA64_NO_FAULT)
        {
                mask = itir_mask(itir);